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J. Paul
J. Paul
GlobalFoundries
Optoelectronics
Physics
Electronic engineering
Logic gate
Field-effect transistor
4
Papers
208
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A cost-efficient 28nm split-gate eFLASH memory featuring a HKMG hybrid bit cell and HV device
2018
IEDM | International Electron Devices Meeting
Ralf Richter
Martin Trentzsch
S. Dunkel
J. Muller
P. Moll
Boris Bayha
K. Mothes
A. Henke
Martin Mazur
J. Paul
Peter Krottenthaler
J. Poth
S. Jansen
R. Huselitz
Hoon Kim
Alban Zaka
Tom Herrmann
El Mehdi Bazizi
Sven Beyer
Parviz Ghazavi
Henry Om'mani
Steven Lemke
Yuri Tkachev
F. Zhou
Jinho Kim
Xian Liu
Vipin Tiwari
Nhan Do
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Evidence of single domain switching in hafnium oxide based FeFETs: Enabler for multi-level FeFET memory cells
2015
IEDM | International Electron Devices Meeting
Halid Mulaosmanovic
Stefan Slesazeck
J. Ocker
Milan Pešić
Stefan Müller
Stefan Flachowsky
Johannes Müller
P. Polakowski
J. Paul
S. Jansen
Sabine Kolodinski
Claudia Richter
S. Piontek
Tony Schenk
Alfred Kersch
Christopher Künneth
R. van Bentum
Uwe Schröder
Thomas Mikolajick
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Citations (64)
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