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Xinyang Yu
Xinyang Yu
Nagoya University
Voltage
CMOS
low leakage
NMOS logic
Linearity
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A 72-nW 440-mV Time Register Using Stacked-NMOS-Switched Gated Delay Cell in Biomedical Applications
2020
APCCAS | Asia Pacific Conference on Circuits and Systems
Guowei Chen
Dang Cong Bui
Xinyang Yu
Md. Zahidul Islam
Atsuki Kobayashi
Kiichi Niitsu
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