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Shigeshi Abiko

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A 1.5V, 200 MHz, 400 MIPS, 188 muA/MHz and 1.2V, 300 MHz, 600 MIPS, 169 muA/MHz Digital Signal Processor Core for 3G Wireless Applications

2004 IEICE Transactions on Electronics
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A 1 V DSP for wireless communications

1997 ISSCC | International Solid-State Circuits Conference
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A 1-V programmable DSP for wireless communications [CMOS]

1997 IEEE Journal of Solid-state Circuits
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A Circuit Library for Low Power and High Speed Digital Signal Processor

1995 IEICE Transactions on Electronics
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