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Yong-Jyun Hu
Yong-Jyun Hu
Computer science
Electronic engineering
Static random-access memory
Chip
CMOS
5
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25
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A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist
2014
IEEE Transactions on Circuits and Systems
Nan-Chun Lien
Li Wei Chu
Chien-Hen Chen
Hao-I Yang
Ming-Hsien Tu
Paul-Sen Kan
Yong-Jyun Hu
Ching-Te Chuang
Shyh-Jye Jou
Wei Hwang
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Citations (22)
A 40nm 256kb 6T SRAM with threshold power-gating, low-swing global read bit-line, and charge-sharing write with Vtrip-tracking and negative source-line write-assists
2014
SoCC | System-on-Chip Conference
Chao-Kuei Chung
Chien-Yu Lu
Zhi-Hao Chang
Shyh-Jye Jou
Ching-Te Chuang
Ming-Hsien Tu
Yu-Hsuan Chen
Yong-Jyun Hu
Paul-Sen Kan
Huan-Shun Huang
Kuen-Di Lee
Yung-Shin Kao
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Citations (1)
A 40nm 1.0Mb 6T pipeline SRAM with digital-based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS tracking and Adaptive Voltage Detector for boosting control
2013
SoCC | Symposium on Cloud Computing
Wei-Nan Liao
Nan-Chun Lien
Chi-Shin Chang
Li Wei Chu
Hao-I Yang
Ching-Te Chuang
Shyh-Jye Jou
Wei Hwang
Ming-Hsien Tu
Huan-Shun Huang
Jian Hao Wang
Paul-Sen Kan
Yong-Jyun Hu
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A 40nm 1.0Mb pipeline 6T SRAM with variation-tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist
2013
ISCAS | International Symposium on Circuits and Systems
Chi-Shin Chang
Hao-I Yang
Wei-Nan Liao
Yi-Wei Lin
Nan-Chun Lien
Chien-Hen Chen
Ching-Te Chuang
Wei Hwang
Shyh-Jye Jou
Ming-Hsien Tu
Huan-Shun Huang
Yong-Jyun Hu
Paul-Sen Kan
Cheng-Yo Cheng
Wei Chang Wang
Jian Hao Wang
Kuen-Di Lee
Chia-Cheng Chen
Wei-Chiang Shih
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內容定址記憶體之三維架構探索與測試 ; Three-Dimensional Architecture Exploration and Testing of Content Addressable Memories
2010
Yongjun Hu
Yong-Jyun Hu
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