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T. Gocho
T. Gocho
Electronic engineering
Dram
Trench
Materials science
Leakage (electronics)
3
Papers
2
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0
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2024
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MOSFET design of 100 nm node low standby power CMOS technology compatible with embedded trench DRAM and analog devices
2001
IEDM | International Electron Devices Meeting
A. Oishi
Ryoji Hasumi
Y. Okayama
K. Miyashita
M Oowada
S. Aota
T. Nakayama
M. Matsumoto
N. Inada
T. Hiraoka
H. Yoshimura
Yoshinori Asahi
Y. Takegawa
T. Yoshida
Kazumasa Sunouchi
A. Yasumoto
Y. Tateshita
M. Ueshima
T.Morikawa
T. Umebayashi
T. Gocho
F. Matsuoka
T. Noguchi
Masakazu Kakumu
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Optimized Shallow Trench Isolation Technology for DRAM Embedded Logic Process
1999
The Japan Society of Applied Physics
T. Yamazaki
K Ohno
N. Tsuchiya
T. Gocho
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Trench Isolation Technology for 0.35m Device by Bias ECR CVD
1991
T. Gocho
Youhei Morita
Junichi Sato
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