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Jae-Min Jang
Jae-Min Jang
SK Hynix
Electronic engineering
Computer science
Real-time computing
Automatic test equipment
Power supply rejection ratio
2
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12
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0
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A 1.2V 38nm 2.4Gb/s/pin 2Gb DDR4 SDRAM with bank group and ×4 half-page architecture
2012
ISSCC | International Solid-State Circuits Conference
Kibong Koo
Sunghwa Ok
Yonggu Kang
Seung-bong Kim
Choung-Ki Song
Hye Young Lee
Hyungsoo Kim
Yongmi Kim
Jeonghun Lee
Seunghan Oak
Yo-Sep Lee
Jungyu Lee
Joongho Lee
Hyungyu Lee
Jae-Min Jang
Jongho Jung
Byeongchan Choi
Yong-Ju Kim
Youngdo Hur
Yunsaing Kim
Byongtae Chung
Yongtak Kim
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Citations (12)
High-PSRR all-digital delay locked loop with burst update mode and power noise damping scheme
2011
VLSIC | Symposium on VLSI Circuits
Yong-Ju Kim
Jae-Min Jang
Jinyeong Moon
Seong Jun Lee
Dae-Han Kwon
Hongseok Choi
Geunwoo Park
Byongtae Chung
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