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L. Rumaner
L. Rumaner
Intel
Electronic engineering
Optoelectronics
NMOS logic
Transistor
Physics
2
Papers
136
Citations
0.01
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A Cu interconnect process for the 130 nm process technology node
2001
Peter K. Moon
C. Allen
Nidhi Anand
D. Austin
T. Bramblett
M. Fradkin
S. Fu
Makarem A. Hussein
J. Jeong
C. Lo
A. Ott
P. Smith
L. Rumaner
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A 130 nm generation logic technology featuring 70 nm transistors, dual Vt transistors and 6 layers of Cu interconnects
2000
IEDM | International Electron Devices Meeting
Sunit Tyagi
Mohsen Alavi
Robert M. Bigwood
T. Bramblett
J. Brandenburg
W. H. Chen
B. Crew
Makarem A. Hussein
P. Jacob
C. Kenyon
C. Lo
B. McIntyre
Z. Ma
Peter K. Moon
P. Nguyen
L. Rumaner
R. Schweinfurth
Swaminathan Sivakumar
M. Stettler
Scott E. Thompson
B. Tufts
J. Xu
Simon Yang
M. Bohr
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Citations (136)
1