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Mong sub Lee
Mong sub Lee
Samsung
Electronic engineering
NMOS logic
Engineering
PMOS logic
Electrical engineering
4
Papers
34
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Integration Friendly Dual Metal Gate Technology Using Dual Thickness Metal Inserted Poly-Si Stacks (DT-MIPS)
2007
VLSIT | Symposium on VLSI Technology
Hyung-Suk Jung
Sung-Kee Han
Ha Jin Lim
Yun-Ki Choi
Cheol-kyu Lee
Mong sub Lee
Young-Sub You
Youngsu Chung
Jong-Bong Park
Eun Ha Lee
Hionsuck Baik
Jong-ho Lee
Nae-in Lee
Ho Kyu Kang
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Citations (3)
Highly Manufacturable Single Metal Gate Process Using Ultra-Thin Metal Inserted Poly-Si Stack (UT-MIPS)
2006
IEDM | International Electron Devices Meeting
Sung-Kee Han
Hyung-Suk Jung
Ha Jin Lim
Min-Joo Kim
Cheol-kyu Lee
Mong sub Lee
Young-Sub You
Hionsuck Baik
Young Su Chung
Eunha Lee
Jong-ho Lee
N.I. Lee
Ho Kyu Kang
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Citations (4)
Dual High-k Gate Dielectric Technology Using Selective AlOx Etch (SAE) Process with Nitrogen and Fluorine Incorporation
2006
VLSIT | Symposium on VLSI Technology
Hyung-Suk Jung
Sung-Kee Han
Ha Jin Lim
Yun-Seok Kim
Min-Joo Kim
Mi Young Yu
Cheol-kyu Lee
Mong sub Lee
Young-Sub You
Youngsu Chung
Seulgi Kim
Hionsuck Baik
Jong-Ho Lee
Nae-in Lee
Ho Kyu Kang
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Citations (14)
122 Mb High Speed SRAM Cell with 25 nm Gate Length Multi-Bridge-Channel MOSFET (MBCFET) on Bulk Si Substrate
2006
VLSIT | Symposium on VLSI Technology
Min Sang Kim
Sung-young Lee
Eun Jung Yoon
Sung-Min Kim
Jim Lian
Kwan-Heum Lee
Nam Myeon Cho
Mong sub Lee
Duhyun Hwang
Yong-seok Lee
Dong-Won Kim
Donggun Park
Byung-Il Ryu
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Citations (13)
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