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Y. H. Kang

Samsung

4

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6

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Impact of gate length and gate oxide thickness on the relationship of FN-stress induced degradation parameters

2011 IIRW | International Integrated Reliability Workshop
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Novel 3-dimensional 46F/sup 2/ SRAM technology with 0.294um/sup 2/ S/sup 3/ (stacked single-crystal Si) cell and SSTFT (stacked single-crystal thin film transistor)

2004 ESSCIRC | European Solid-State Circuits Conference
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Highly Manufacturable 64M bit Ultra Low Power SRAM Using a Novel 3-Dimensional S3 (Stacked Single-crystal Si) Cell Technology

2004 The Japan Society of Applied Physics
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Fabrication and characteristics of novel load PMOS SSTFT (Stacked Single-crystal Thin Film Transistor) for 3-Dimensional SRAM memory cell

2004 SOI | International SOI Conference
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