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Jeffrey Tyhach
Jeffrey Tyhach
Altera
Electronic engineering
Computer science
External memory interface
Source-synchronous
Input/output
3
Papers
26
Citations
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Arria™ 10 device architecture
2015
CICC | Custom Integrated Circuits Conference
Jeffrey Tyhach
Michael D. Hutton
Sean R. Atsatt
Arifur Rahman
Brad Vest
David Lewis
Martin Langhammer
Sergey Shumarayev
Tim Tri Hoang
Allen Chan
Dong-myung Choi
Dan Oh
Hae-Chang Lee
Jack Chui
Ket Chiew Sia
Edwin Yew Fatt Kok
Wei-Yee Koay
Boon-Jin Ang
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Citations (12)
A 90-nm FPGA I/O buffer design with 1.6-Gb/s data rate for source-synchronous system and 300-MHz clock rate for external memory interface
2005
IEEE Journal of Solid-state Circuits
Jeffrey Tyhach
Bonnie I. Wang
Chiakang Sung
Joseph Huang
Khai Nguyen
Xiaobao Wang
Yan Chong
Philip Pan
Henry Kim
Gopinath Rangan
Tzung-Chin Chang
Johnson Tan
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Citations (9)
A 90 nm FPGA I/O buffer design with 1.6 Gbps data rate for source-synchronous system and 300 MHz clock rate for external memory interface
2004
CICC | Custom Integrated Circuits Conference
Jeffrey Tyhach
Bonnie I. Wang
Chiakang Sung
Joseph Huang
Khai Nguyen
Xiaobao Wang
Yan Chong
Philip Pan
Henry Kim
Gopinath Rangan
Tzung-Chin Chang
Johnson Tan
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Citations (5)
1