The Functional Units of a Digital Computer
0
Citation
8
Reference
10
Related Paper
Keywords:
Calculator
Arithmetic logic unit
Desk
Second-order arithmetic
Arithmetic circuit complexity
Floating-point unit
This paper presents the organization of an arithmetic unit for variable long-precision (VLP) operands suitable for reconfigurable computing. The reconfigurable arithmetic coprocessor (RAC) cooperates with the host computer in the VLP tasks. The main design issues addressed in the paper are: (a) mapping of the most frequent and time consuming operations of the VLP arithmetic algorithms to RAG, and (b) design of VLP algorithms that allow reduced reconfiguration time between arithmetic operations. The VLP arithmetic algorithms proposed cover multiplication, division and square root. In this paper we present the main building blocks used in the VLP arithmetic circuits, show the similarities of each arithmetic operator and present area/time estimates of these circuits in Xilinx FPGAs.
Arithmetic logic unit
Coprocessor
Operand
Saturation arithmetic
Control reconfiguration
Arithmetic circuit complexity
Floating-point unit
Cite
Citations (21)
In chapter 7, the function of the arithmetic unit has been defined loosely as the performance of arithmetic operations. As such, the capabilities of the arithmetic unit have been compared to those of a desk calculator. Although this analogy is valid in a general sense, the capabilities of arithmetic units exceed those of the desk calculator: in addition to arithmetic operations, certain logic data manipulations can be performed. Moreover, the particular manner in which operations are performed is influenced by the electronic design. In the following paragraphs we shall discuss three types of operations: fixed-point arithmetic operations, logic operations, and floating-point arithmetic operations. Incidental to this discussion, we shall see structures required for the implementation of the individual operations. In conclusion, several sample layouts of arithmetic units are indicated in which the individual requirements are combined.
Calculator
Arithmetic logic unit
Desk
Second-order arithmetic
Floating-point unit
Arithmetic circuit complexity
Cite
Citations (0)
Ideal for graduate and senior undergraduate courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, provides a balanced, comprehensive treatment of computer arithmetic. It covers topics in arithmetic unit design and circuit implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations, floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics-including techniques for high-throughput, low-power, fault-tolerant, and reconfigurable arithmetic. An appendix provides a historical view of the field and speculates on its future.An indispensable resource for instruction, professional development, and research, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs, worked-out examples, and a large collection of meaningful problems. This second edition includes a new chapter on reconfigurable arithmetic, in order to address the fact that arithmetic functions are increasingly being implemented on field-programmable gate arrays (FPGAs) and FPGA-like configurable devices. Updated and thoroughly revised, the book offers new and expanded coverage of saturating adders and multipliers, truncated multipliers, fused multiply-add units, overlapped quotient digit selection, bipartite and multipartite tables, reversible logic, dot notation, modular arithmetic, Montgomery modular reduction, division by constants, IEEE floating-point standard formats, and interval arithmetic.Features:* Divided into 28 lecture-size chapters * Emphasizes both the underlying theories of computer arithmetic and actual hardware designs * Carefully links computer arithmetic to other subfields of computer engineering * Includes 717 end-of-chapter problems ranging in complexity from simple exercises to mini-projects * Incorporates many examples of practical designs * Uses consistent standardized notation throughout * Instructor's manual includes solutions to text problems * An author-maintained website http://www.ece.ucsb.edu/~parhami/text_comp_arit.htm contains instructor resources, including complete lecture slides
Saturation arithmetic
Modular arithmetic
Arithmetic circuit complexity
Arithmetic logic unit
Floating-point unit
Cite
Citations (1,160)
This paper presents results which stem from a research effort concerned with the specification and design of arithmetic units which can execute nonstandard integer and floating-point arithmetic. An arithmetic unit is proposed whose characteristics are based on user specifications and subsequently is termed a Polymorphic Arithmetic Unit (PAU). The user binds the identity of the PAU by specifying the contents of various descriptors and semantic interpretation tables which the PAU accesses during its execution. This capability removes several of the restrictions found in commercially available arithmetic units and potentially assists in mak-ink mathematically software portable.
Arithmetic logic unit
Floating-point unit
Arithmetic circuit complexity
Saturation arithmetic
Cite
Citations (4)
Arithmetic circuits plays an important role in digital systems. Realization of complex digital circuits is possible with development in very large scale integration (VLSI) circuit technology. In this paper an arithmetic unit based on IEEE-754 standard for floating point numbers has been implemented on Spartan3E XC3S500e FPGA Board. Here Floating Point Unit (FPU) follows IEEE single precision format. Various arithmetic operations such as, addition, subtraction multiplication and division on floating point numbers have been performed on arithmetic unit. Novel approach of converting fixed to floating point saves around 30% of slices and can perform 50 Mega floating point operations per second on Spartan 3E FPGA at 50 MHz clock. Arithmetic operations using proposed conversion optimize space and speed requirements.
Arithmetic logic unit
Floating-point unit
Saturation arithmetic
Double-precision floating-point format
IEEE floating point
Single-precision floating-point format
Realization (probability)
Subtraction
Arithmetic circuit complexity
Cite
Citations (4)
Floating point arithmetic fpga implementation described various arithmetic operations like addition, subtraction, multiplication, division. Floating point fpga arithmetic unit are useful for single precision and double precision and quad precision .This precision specify various bit of operation. In science computation this circuit is useful. A general purpose arithmetic unit require for all operations. In this paper single precision floating point arithmetic calculation is described. This paper includes single precision, double precision and quad precision floating point format representation and provide implementation technique of various arithmetic calculation. Double precision and quad precision format specify more bit operation. Low precision custom format is useful for reduce the associated circuit costs and increasing their speed. Fpga implementation of Floating point arithmetic calculation provide various step which are require for calculation. Normalization and alignment are useful for operation and floating point number should be normalized before any calculation. I consider the implementation of 64/ 128-bit precision circuits.
Single-precision floating-point format
Double-precision floating-point format
Saturation arithmetic
Floating-point unit
IEEE floating point
Arithmetic logic unit
Subtraction
Normalization
Lookup table
Cite
Citations (1)
As we advance into the new century, computers of the future will require techniques for arithmetic operations that take advantage of the modern technology and yield accurate results. Floating-point arithmetic has been in use for nearly forty years but is plagued with inaccuracies and limitations which necessitates introduction of a new concept in computer arithmetic called composite arithmetic. This paper describes composite arithmetic and design of an arithmetic unit based on this concept.
Saturation arithmetic
Arithmetic logic unit
Arithmetic circuit complexity
Floating-point unit
Affine arithmetic
Cite
Citations (0)
Calculator
Arithmetic logic unit
Desk
Second-order arithmetic
Arithmetic circuit complexity
Floating-point unit
Cite
Citations (0)
Calculator
Arithmetic logic unit
Desk
Second-order arithmetic
Arithmetic circuit complexity
Floating-point unit
Cite
Citations (0)
Interval arithmetic as part of interval mathematics and Granular Computing is unusually im- portant for development of science and engineering in connection with necessity of taking into account uncertainty and approximativeness of data occurring in almost all calculations. Interval arithmetic also conditions development of Artificial Intelligence and especially of automatic think- ing, Computing with Words, grey systems, fuzzy arithmetic and probabilistic arithmetic. However, the mostly used conventional Moore-arithmetic has evident weak-points. These weak-points are well known, but nonetheless it is further on frequently used. The paper presents basic operations of RDM-arithmetic that does not possess faults of Moore-arithmetic. The RDM-arithmetic is based on multi-dimensional approach, the Moore-arithmetic on one-dimensional approach to interval calculations. The paper also presents a testing method, which allows for clear checking whether results of any interval arithmetic are correct or not. The paper contains many examples and illustrations for better understanding of the RDM-arithmetic. In the paper, because of volume limitations only operations of addition and subtraction are discussed. Operations of multiplica- tion and division of intervals will be presented in next publication. Author of the RDM-arithmetic concept is Andrzej Piegat.
Affine arithmetic
Interval arithmetic
RDM
Saturation arithmetic
Subtraction
Arithmetic logic unit
Arithmetic circuit complexity
Arithmetic function
Second-order arithmetic
Modular arithmetic
Cite
Citations (57)