Opportunities for interconnection of adjacent distribution feeders in GB networks
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This paper presents an investigation into the potential benefits of interconnecting adjacent 33 kV demand groups in the GB distribution network by presentation of two case studies. Results presented are, firstly, a comparison of load profiles of adjacent groups and, secondly, following application of a series of credible future scenarios, the potential reduction in loss of load and generation curtailment achievable from interconnection and the proportion of time for which interconnection would be utilised. It was found that there is significant dissimilarity between load profiles of the adjacent groups analysed and interconnection could be valuable for the future distribution system. The value of interconnection could be increased with the use of storage, though more analysis is needed to quantify the economic viability of this.In order to place sensors or electronics in very high temperature environments, new materials and methods for interconnection are required. A comparative study between different electrical interconnection methods for very high operation temperatures (500°C - 800°C) is presented. Thermo-mechanical simulations and characterization of samples of the interconnection types during high temperature exposure are presented. The results of the thermo-mechanical simulations showed that stresses are low in a connection system based on liquid interconnection. This system, however, proved to be difficult to realize due to problems with oxides and sealing of the metallic liquid. Modeling of an interconnection based purely on mechanical pressure without any solder or metallic bond showed high stress. This was also confirmed during high temperature exposure where the connection failed. High stress was also predicted for an interconnection based on nano-Ag paste. The high temperature tests, however, showed promising results at 800°C for over 100 hours.
Liquid metal
Electronic Packaging
Characterization
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Continue on reverse if nocostory a n d identify by Mode num ber)In this paper we show that it is necessary to utilize different partitioning coefficients in interconnection length analyses which are based on Rent's rule, depending on whether one-or two-dimensional placement strategies are used, jJ is the partitioning coefficient in the power-law relationship o B $ which provides a measure of the number of interconnection that cross a boun dary which encloses B blocks.The partitioning coefficients are p=p/2 and p=p for two-and one dimensional arrays, respectively, where p is the experimental coefficient, of the Rent relationship T = o B '. Based on these separate partitioning coefficients, an average interconnection length pred iction is presented for rectangular arrays that outperforms existing predictions.Examples are given to support this theory.
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As the trend of microelectronic systems moves toward higher performance and speed, ultra-high density interconnection technology must be developed. To satisfy this requirement, a new concept called bumpless interconnection for next generation of packaging is proposed, which might bridge to global interconnection on chip. This technology will be most suitable and inevitable for ultra-high density interconnection when pad and pitch sizes are reduced to a few micrometers. Also the combination of a thin chip and a flexible substrate will be required for such interconnection since pads in the size of micrometers can not cope with the thermal stress in the bonding process. The surface activated bonding (SAB) method enables direct bonding at room-temperature. Thereby the SAB method is considered to be a most appropriate method for bumpless interconnection. Another requirement for bumpless interconnection is the bonding between Cu thin films because Cu is the most promising conductive material. Since SAB method requires no heat, large initial contact area must be maintained to obtain enough interconnection, For the purpose, the surface of Cu thin film must be highly flattened, for example, by Cu process. In this paper, a few fundamental experiments and preliminary results of investigations on the feasibility of CMP-Cu direct bonding at room temperature for bumpless interconnection are presented.
Microelectronics
Direct bonding
Wire bonding
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This chapter contains sections titled: Introduction Interconnection Technologies Standards and Codes for Interconnection Interconnection Considerations Interconnection Examples for Alternative Energy Sources References
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Carbon nanotube interconnection has been considered as substitute of copper interconnection in the future VLSI, due to its high current carrying capacity and thermal conductivity. The crosstalk effects in multi-wall carbon nanotube (MWCNT) interconnection are investigated with simulation software SPICE in this paper.Equivalent-circuit modelswhich based on electromagnetism and quantum theory were extractedare modified for MWCNT interconnection.The crosstalk of MWCNT interconnection in different diameters and lengths are simulated at room temperature. The performance of MWCNT interconnection is evaluated and compared with double-wall carbon nanotube (DWCNT). It turned out that MWCNT interconnection can achieve smaller crosstalk effects than that of same size DWCNT interconnection. The MWCNT interconnection is actually performed better.
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Spice
Quantum capacitance
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This paper presents an investigation into the potential benefits of interconnecting adjacent 33 kV demand groups in the GB distribution network by presentation of two case studies. Results presented are, firstly, a comparison of load profiles of adjacent groups and, secondly, following application of a series of credible future scenarios, the potential reduction in loss of load and generation curtailment achievable from interconnection and the proportion of time for which interconnection would be utilised. It was found that there is significant dissimilarity between load profiles of the adjacent groups analysed and interconnection could be valuable for the future distribution system. The value of interconnection could be increased with the use of storage, though more analysis is needed to quantify the economic viability of this.
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Microprocessor
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Interconnection schemes are ubiquitous in physical systems. For instance, in multi-domain systems consisting of interconnected subsystems from different physical domains. Furthermore, the interconnection of two or more systems has also been exploited to analyze and control dynamical systems, especially passive ones. To this end, the most common interconnection structure is the negative feedback interconnection. However, this approach is unsuitable to directly couple the states of the subsystems in the overall system’s energy as customarily occurs in physical systems. This letter provides two interconnection approaches that overcome this issue. Notably, it is shown that these interconnection structures are suitable for decomposing passive systems into the interconnection of simpler passive subsystems. Moreover, these interconnections schemes allow the interpretation of some existing nonlinear control approaches as the interconnection of a passive plant with a passive controller. Additionally, the interpretation of the proposed interconnection structures is provided via bond graphs.
Physical system
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In this paper I review the recent paper by DeGraba (2000) that proposes a version of Bill and Keep (called COBAK) as the efficient interconnection regime. I argue while the proposed interconnection regime is suitable for some types of interconnection it would be quite undesirable for others. I show that whether the COBAK approach is suitable for a particular type of interconnection depends on, among other things, the importance of network externalities and on the willingness of called parties versus calling parties to pay for calls.
Externality
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Silicon has always been considered a dense and cheap medium for making wires, especially when compared with traditional interconnection media on a per interconnection basis. However interconnection costs in all technologies are essentially invariant on a per unit length basis. The advancing scale of integration has allowed active devices to be smaller and closer together, so wiring, both on chip and in systems, has been cheaper because there has been less of it. It is shown that substrate interconnection capability (in inches of wire per square inch of substrate) is the critical factor in achieving compact low-cost systems characterized by high interconnection density. A relationship between the active silicon area of devices on a substrate and the interconnection capability of the substrate is presented.
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