A magnetic synapse: multilevel spin-torque memristor with perpendicular anisotropy
Steven LequeuxJ. SampaioVincent CrosKay YakushijiAkio FukushimaRie MatsumotoHitoshi KubotaShinji YuasaJulie Grollier
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Abstract:
Abstract Memristors are non-volatile nano-resistors which resistance can be tuned by applied currents or voltages and set to a large number of levels. Thanks to these properties, memristors are ideal building blocks for a number of applications such as multilevel non-volatile memories and artificial nano-synapses, which are the focus of this work. A key point towards the development of large scale memristive neuromorphic hardware is to build these neural networks with a memristor technology compatible with the best candidates for the future mainstream non-volatile memories. Here we show the first experimental achievement of a multilevel memristor compatible with spin-torque magnetic random access memories. The resistive switching in our spin-torque memristor is linked to the displacement of a magnetic domain wall by spin-torques in a perpendicularly magnetized magnetic tunnel junction. We demonstrate that our magnetic synapse has a large number of intermediate resistance states, sufficient for neural computation. Moreover, we show that engineering the device geometry allows leveraging the most efficient spin torque to displace the magnetic domain wall at low current densities and thus to minimize the energy cost of our memristor. Our results pave the way for spin-torque based analog magnetic neural computation.Keywords:
Memristor
Memistor
Neuromorphic engineering
Domain wall (magnetism)
Tunnel magnetoresistance
Spin-transfer torque
Memristor
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Neuromorphic engineering
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Nanoscale memristors open up new opportunities for the development of brain neural networks. Simple and precise memristors enhance the performance of various neural networks and operational circuits. In this letter, a three-terminal memristor is proposed, which makes the memristor more flexible and practical in circuit design and application through the introduction of a control port. Consid-ering that the resistance of a three-terminal memristor consists of three parts, i.e., metal region, low-resistance region, and high-resistance region, a three-segment piecewiselinear method is applied to fit these three regions. The model of this memristor is constructed through the derivation of the memristor formula and working principle.Candence simulations are conducted on the resultant circuit to verify its correctness.
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Port (circuit theory)
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Neuromorphic engineering
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The memristance variation of a single memristor with voltage input is generally a nonlinear function of time. Linearization of memristance variation about time is very important for the easiness of memristor programming. In this paper, a method utilizing an anti-serial architecture for linear programming is addressed. The anti-serial architecture is composed of two memristors with opposite polarities. It linearizes the variation of memristance by virtue of complimentary actions of two memristors. For programming a memristor, additional memristor with opposite polarity is employed. The linearization effect of weight programming of an anti-serial architecture is investigated and memristor bridge synapse which is built with two sets of anti-serial memristor architecture is taken as an application example of the proposed method.
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Memistor
Linearization
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Memristor had been first theorized nearly 40 years ago by Prof. Chua, as the fourth fundamental circuit element beside the three existing elements (Resistor, Capacitor and Inductor) but because no one has succeeded in building a memristor, it has long remained a theoretical element. Some months ago, Hewlett-Packard (hp) announced it created a memristor using a TiO 2 /TiO 2-X structure. In this paper, the characteristics, structures and relations for the invented hp's memristor are briefly reviewed and then two general SPICE models for the charge-controlled and flux-controlled memristors are introduced for the first time. By adjusting the model parameters to the hp's memristor characteristics some circuit properties of the device are studied and then two important memristor applications as the memory cell in a nonvolatile-RAM structure and as the synapse in an artificial neural network are studied. By utilizing the introduced models and designing the appropriate circuits for two most important applications; a nonvolatile memory structure and a programmable logic gate, circuit simulations are done and the results are presented.
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Electrical element
Non-Volatile Memory
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In this article, we have proposed an emulator using DVCC and OTA analog building blocks to emulate memristive behavior. Along with OTA and DVCC, one resistor and one capacitor are used in the memristor emulator. The presented memristor emulator works in incremental and decremental mode and operates up to 8 MHz. The proposed memristor emulator is simulated using PSpice with a 180 nm CMOS parameter. The flexibility of the memristor is tested by simulating it at different temperatures. The adaptability of the memristor emulator during circuit implementation is tested by connecting the memristors in parallel.
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The advent of the memristor breaks the scaling limitations of MOS technology and prevails over emerging semiconductor devices. In this paper, various memristor models including behaviour, spice, and experimental are investigated and compared with the memristor's characteristic equations and fingerprints. It has brought to light that most memristor models need a window function to resolve boundary conditions. Various challenges of availed window functions are discussed with matlab's simulated results. Biolek's window is a most acceptable window function for the memristor, since it limits boundaries growth as well as sticking of states at boundaries. Simmons tunnel model of a memristor is the most accepted model of a memristor till now. The memristor is exploited very frequently in memory designing and became a prominent candidate for futuristic memories. Here, several memory structures utilizing the memristor are discussed. It is seen that a memristor-transistor hybrid memory cell has fast read/write and low power operations. Whereas, a 1T1R structure provides very simple, nanoscale, and non-volatile memory that has capabilities to replace conventional Flash memories. Moreover, the memristor is frequently used in SRAM cell structures to make them have non-volatile memory. This paper contributes various aspects and recent developments in memristor based circuits, which can enhance the ongoing requirements of modern designing criterion.
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Memistor
Non-volatile random-access memory
Non-Volatile Memory
Flash Memory
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The present study considers the reviews done on memristor in the recent years, and also investigates three different models of memristor structure including linear, non-linear and the performance of memristor in high-chaos circuits. As the results of the simulation indicate non-linear model has a better performance than linear one. Two distinct features of memristor include low power consumption and its capability to have a memory.
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Memristors are passive non-linear circuit components with memory characteristics, and have been recognized as the fourth basic circuit component, along with resistors, capacitors, and inductors. It has been nearly half a century since the conceptualisation of the memristor, and related research has mainly focussed on the two aspects of binary and continuous memristors. However, compared with these two types of memristors, tri-state and multi-state memristors have greater data density per device, with rich dynamics and great potential in logic and chaotic circuit applications. Moreover, previous studies show that the series-parallel connection of memristor generates more diverse circuit behaviours and increased capacity over a single memristor. However, most of this research is based on mathematical analysis, and lack behavioural circuit simulations or experimental validation. Here, the tri-state memristor is proposed and the mathematic and equivalent Spice models of the tri-state memristor is shown. Furthermore, the circuit characteristics are studied with a complete characterisation of its series-parallel behaviours of the tri-state memristor. Simulations are performed with LTSpice, and the results verify the theoretical analysis, which provides a strong experimental basis for the study of combinational memristive circuits.
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Memistor
Spice
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Memristor
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Non-Volatile Memory
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