Copper-based metallization for ULSI circuits
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Electromigration
Metallizing
Diffusion barrier
Copper interconnect
A compact model for early electromigration failures in copper dual-damascene interconnects is proposed. The model is based on the combination of a complete void nucleation model together with a simple mechanism of slit void growth under the via. It is demonstrated that the early electromigration lifetime is well described by a simple analytical expression, from where a statistical distribution can be conveniently obtained. Furthermore, it is shown that the simulation results provide a reasonable estimation for the lifetimes.
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Copper interconnect
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The electromigration failure development in typical copper dual-damascene interconnect structures is analyzed based on numerical simulations. The origin of the lognormal distribution of electromigration times to failure is investigated. Also, electromigration-induced void formation and evolution in advanced 0.18 μm dual-damascene lines are simulated and the results are compared with experiments. It is shown that the lognormal distribution of the grain sizes leads to lognormal distributions of the electromigration lifetimes. Moreover, the void nucleation sites and main features of void development are highly dependent on the microstructure of the interconnect lines.
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We demonstrate the electromigration threshold, or the so-called short-length effect, in single-damascene copper interconnects with SiO/sub 2/ dielectrics. With standard electrical lifetime measurements and a simplified equation based on the Blech model, the length-dependent electromigration behavior is studied quantitatively over a temperature range between 295/spl deg/C and 400/spl deg/C. It is shown that the electromigration threshold becomes more prominent with decreasing temperature. The applicability of the proposed equation is justified, and the practical aspects of the electromigration threshold in copper technologies are discussed.
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Copper interconnect
Low-k dielectric
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This paper is to study the influence of Cu surface clean process on stressvoiding and electromigration of Cu dual damascene metallization. A superior Cu pre-cleaning process condition is developed to improve Cu stress-induced voiding (SIV) and electromigration (EM). Higher pre-clean bias-power and shorter pre-clean time demonstrate remarkable low via resistance and excellent Cu reliability performance.
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In this study, the effects of the via number and the current direction on electromigration characteristics in the dual-damascene Cu lines have been investigated. The results reveal an interesting difference in electromigration behavior of electron up- and down-flow directions on the multi-via structures. Increasing the via number results in a higher electromigration failure time and then reaches saturation for electron up-flow case. As for electron down-flow direction, the failure time is independent of the via number. Moreover, the failure time of Cu lines with via structure is lower than that without via structure. A higher current density at the triple junction site in the inner via is the possible mechanism, resulting in a shorter failure time and via-number independent. These observed effects are specific to Cu dual-damascene structures and can provide great technological implications in electromigration improvement.
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Electromigration
Copper interconnect
Low-k dielectric
Barrier layer
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Electromigration
Copper interconnect
Chemical Mechanical Planarization
Diffusion barrier
Surface diffusion
Low-k dielectric
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In this paper, we attempt to combine short length and via number effects to study the impact on the electromigration (EM) characteristics of dual damascene Cu lines. The results revealed interesting differences in electromigration behaviours of long and short length Cu lines. Increasing via number resulted in a higher electromigration failure time, but is related to the line length. For multiple-via structures with short Cu length, electromigration lifetime was significantly enhanced due to obvious back-stress effect and single failure mechanism of line depletion. These observed effects are specific to Cu dual-damascene structures and can have great technological implications for electromigration assessment.
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Electromigration threshold has been measured for unpassivated damascene Al(Cu) interconnects by drift experiments on Blech-type test structures, and results are compared to equivalent plasma-etched lines. When using a damascene implementation, the critical product of current density and stripe length increases significantly. As a result, the incubation period, needed for Cu depletion beyond a critical length, is increased over a wide temperature range (155–230 °C). This is shown to be an intrinsic effect, directly controlling the relative electromigration performance of both metallization schemes.
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