The IBM Victor V256 partitionable multiprocessor

In a device for varying the output voltage of a MOS FET of the type wherein the gate thereof is connected through a neon bulb to an input terminal and is grounded through a capacitor, an output voltage limiter circuit is placed in order to limit the range of variation in output voltage. The limiter circuit comprises two series-connected circuits connected in parallel, one series-connected circuit consisting of a first diode whose anode is connected to the collector of a PNP transistor and the other, a second diode whose cathode is connected to the collector of an NPN transistor. The cathode and anode of the first and second diodes are connected to the terminal on the side of the input terminal of the neon bulb, and the bases of both PNP and NPN transistors are connected to an output terminal, that is the source of the MOS FET. The emitter voltage applied to the NPN transistor is so selected that when the output voltage exceeds the emitter voltage, the NPN transistor is turned on so that the neon bulb is turned off. Thus the output voltage may be maintained at a predetermined maximum level even when the positive input voltage increases. On the other hand, the emitter voltage applied to the PNP transistor is so selected that when the output voltage drops below the emitter voltage as the negative input voltage increases, the PNP transistor is turned on so that the neon bulb is also turned off. Thus the output voltage may be maintained at a predetermined minimum level. Between the maximum and minimum levels, the output voltage may be gradually and steplessly varied, for instance, over the operating range of a differential amplifier connected to the output terminal. Moreover, two neon bulbs may be inserted in the limiter circuit so that one of them may be turned on when the maximum voltage is reached while the other is turned on when the minimum output voltage is reached.