Efficient Supply Modulator for Wide-band Envelope Elimination and Restoration Power Amplifiers

A fast transient response supply modulator has been realized and verified in envelope elimination and restoration (EER) power amplifier. The analysis and detailed design of the proposed architecture is presented. Simulation results, in 130nm CMOS technology, show that the proposed supply modulator achieves better linearity and efficiency compared to the conventional hybrid mode supply modulators or hybrid envelope elimination and restoration (H-EER) when signal frequency increases. Adjacent channel leakage ratio (ACLR) requirements are met for an LTE signal with 5MHz, 10MHz, and 20MHz BW with error vector magnitude (EVM) less than 3% and efficiency of 79%, 73%, 67%, respectively at an output power of 0.45W. Post-layout simulations are performed across different process corners and the effects of real off-chip components and routes are taken into consideration to verify the robustness of the proposed solution.