Scaled p-channel Ge FinFET with optimized gate stack and record performance integrated on 300mm Si wafers
2013
We demonstrate scaled, replacement gate high-k/metal gate p-channel Ge FinFETs integrated onto 300mm Si wafers for which the best device shows record peak g m, ext =2.7mS/μm (g m, int =3.3mS/μm), Q (≡g m, ext /SS sat ) = 32.4 and I on = 497μA/μm at I off = 100nA/μm, all at V ds = -0.5V. The high performance is a result of successful integration of oriented, highly scaled Ge fins on silicon substrates and of a low D it gate stack with capacitance equivalent thickness=8Å. This optimized gate stack supports the highest hole mobility ever reported at sub-10Å CET. Furthermore, Ge FinFETs in the present work outperform any other reported Ge devices by more than ~2.5× (g m /SS metric) and ~2× (I on /I off metric) at shortest gate lengths (down to 20nm) to the best of our knowledge.
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