A digitally controlled oscillator suitable for on-chip integration in 65 nm CMOS

A fully integrated digitally controlled oscillator (DCO) used as an on-chip clock is presented in this paper. The DCO system is implemented using symmetrical NAND based digitally controlled delay line (DCDL) structure which has balanced loading with balanced number of fan-in and fan-out. This unique configuration maintains delay linearity, also the frequency tuning is easily accomplished without any external controller structures which makes it less sensitive to process variation. Using a 65 nm CMOS process and 1.2 V supply voltage, the proposed DCO has a frequency range of (14–203) MHz occupies an on-chip area of about 0.0015 μm 2 and power dissipation of 0.58 mW @ 203 MHz frequency.