Impact Ionization Control in 50 nm Low-Noise High-Speed InP HEMTs with InAs Channel Insets

Impact ionization negatively affects transistor noise properties at low and mm-wave frequencies. We show that composite InAs/GaInAs channels with thin InP sub-channels can be engineered to greatly suppress impact ionization and achieve improved noise properties while maintaining excellent HEMTs cutoff frequencies (f T /f MAX > 410/660 GHz with L G = 50 nm). This is the first demonstration of high-performance HEMTs combining InAs channel insets with InP sub-channels. HEMTs with a 3 nm InAs inset and an InP sub-channel outperform designs relying on 5 nm InAs insets in f T /f MAX metrics at higher drain biases and currents, as well as in low-noise performance. At 40 GHz, the 3 nm InAs inset HEMT shows NFMIN = 0.65 dB (compared to 0.93 and 1.15 dB for the 5 nm InAs inset HEMTs, with and without InP sub-channel, respectively). We extract the "impact ionization transconductance" g im from S-parameter measurements to quantify and map impact ionization levels over the I DS -V DS domain for the first time, clearly showing a delayed onset to higher V DS and I DS values in the optimized channel design (3 nm InAs inset with an InP sub-channel).