Systematic Study of V th controllability using ALD-Y 2 O 3 , La 2 O 3 , and MgO 2 layers with HfSiON/metal gate first n-MOSFETs for hp 32 nm bulk devices

We present a systematic examination of V th controllability using Y 2 O 3 , La 2 O 3 , and MgO 2 layers by atomic-layer-deposition (ALD) technology with HfSiON/TaSiN gate first stacks for half-pitch (hp) 32 nm-node metal gated bulk devices. By employing base-Y 2 O 3 layers of 1 mono-layer (ML th controllability (|DeltaV th |> 130 mV), high electron carrier mobility, and very high drain current (> 1100 muA/mum) at a low I off value (100 nA/mum). Moreover, the positive-bias-temperature-instability (PBTI) over a 10-year lifetimes can be readily achieved with V g = +1.0 V at 125degC.