Fabrication and Evaluation of Split-Gate Type Charge-Trapping Nonvolatile Memory with High-k Trapping and Blocking Layers for Embedded Flash

2021 
High-k dielectrics are implemented in a split-gate type charge-trapping nonvolatile memory (SG-CTNVM) [1]. Owing to the split-gate structure and optimized trapping properties of HfSiO film, a memory window of 3.0 V was realized under ±6 V and fast 1 μs program/ 100 μs erase condition. Retention property was significantly improved by insertion of SiON film in blocking Al 2 O 3 layer and introduction of SiO 2 inner spacer. The blocking SiON layer was formed by deposition technique only, without thermal oxidation which was found to degrade P/E cycling.
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