High-Throughput CDEF Architecture for the AV1 Decoder Targeting 4K@60fps Videos

This paper presents a high throughput architecture for the Constrained Directional Enhancement Filter (CDEF) defined in the AOM Video 1 (AV1) decoder. CDEF is one of the three in-loop filters of the AV1 that, together, aim to reduce different types of coding artifacts. The CDEF is used as a deringing filter in this context. The proposed CDEF hardware architecture implements its both operations: The Direction Search module and the Non-Linear Low Pass Filter, processing 64 luminance or 16 chrominance samples per clock cycle. This architecture can process Ultra-High Definition (UHD) videos at 60 frames per second when running at only 23 MHz. The architecture was synthesized to ASIC using the 40nm TSMC library, requiring 369K gates and with a power dissipation of 65 mW. At the best of the authors’ knowledge, this is the first hardware design targeting the AV1 CDEF filter presented in the literature.