Old Web
English
Sign In
Acemap
>
Paper
>
Design Method of Easily Testable Parallel Adders under Delay Constraints
Design Method of Easily Testable Parallel Adders under Delay Constraints
2011
Fujii Shinichi
Takagi Naofumi
Keywords:
Parallel computing
Design for testing
Computer architecture
Carry-select adder
Carry-save adder
Adder
Computer science
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]