A Sample-and-Hole Circuit for Analysis and Design of a 12bit 100MS/s ADC

2007 
This paper presents a sample-and-hole(S/H) circuit for a 12-bit, 100MS/s ADC under 1.8V supply voltage. A novel bootstrapped switch is used to improve the reliability and linearity in the S/H circuit. For the design of the operational transconductance amplifier(OTA) with high-gain and wideband, we implement a new design method based on optimizing the bandwidths and phase margins of the main amplifier and the auxiliary amplifier. Simulation results show that the peak signal-to-noise-and-distortion(SNDR) is 82dB with a 49MHz sinusoidal input, the differential output swing of the OTA achieves as high as 2V, and power dissipation of the whole circuit is 20mW.
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