High‐linearity and high‐speed CMOS 1‐chip A/D, D/A converters. all‐digital linearity error correction (LECS)

This paper describes an all-digital linearity error correction (LECS) method for A/D and D/A converters, and presents the design and performance of single-chip CMOS LSI converters utilizing this new technique. In general, the deterioration of converter accuracy is caused by discontinuity changes (jumps) of the converter characteristics due to component tolerances in the weighting network. The proposed correction method is based on a design ensuring that only negative jumps occur which are then eliminated digitally by a shifting of digital output (input) codes. Since this method does not require analog circuits, the number of noise sources is minimum and high reliability is achieved by eliminating physical trimming. Experimental CMOS converters have been realized utilizing the proposed method; the D/A converter provides an S/N of 92 dB at 150 ksps, and 87 dB is achieved by the A/D at 78 ksps. Thus, the possibility of realizing high-quality audio converters by MOS process technology has been demonstrated.