New EEPROM concept for single bit operation
2007
This paper presents a new small EEPROM memory with dual-control gate which allows high density memory application with single bit operations. This new architecture is based on a previous work proposed by Regnier et al. in 2004. The specificity was to use a dual-control gate EEPROM in order to control the coupling ratio on floating gate and so perform the memory operations without select transistor.
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