Performance and Flexibility for Multiple-Processor SoC Design

Publisher Summary The steady, rapid improvement in system-on-chip (SoC) gate density opens the door to a wide spectrum of new digital products. The way to speed up the development of mega-gate SoCs is the use of multiple microprocessor cores to perform much of the processing currently relegated to RTL. The new design methodology—configuration, extension, and programming of application-specific processors—in place of register-transfer-level (RTL) logic design offers important benefits and allows system designers to exploit the gate counts of mega-gate SoCs. Because microprocessors employ firmware for their control algorithm instead of RTL-defined hardware, it is easier and faster to develop and verify processor-based task engines for many embedded SoC tasks than it is to develop and verify RTL-based hardware blocks to perform the same tasks. This change in design technique allows the easy addition of new features at anytime during product development, even after the product has been fielded because of the software's flexibility.