Design and Fabrication of Feasible 3D Optoelectronics Integration Based on Embedded IC Fanout Technology

Hybrid integration allows for independent process selection for each device so that overall system can potentially achieve the best performance. This paper presents a hybrid optoelectronics integration including a TIA chip and a PD chip. The PD chip is embedded in a substrate while the electrical pad and the light receiving area is faced up. The TIA is flip chipped on the PD die to decrease the parasitic parameter, induced by bonding wires used in the conventional package so that high-speed interconnection can be obtained. The core substrate materials with low CTE and high Tg were selected to improve reliability. The light-sensitive material is used as buildup layer and the light receiving area of PD is exposed to increase the optical coupling efficiency. Thermal and electrical simulation of the 3D module were performed, temperature profile and S parameter of the module were achieved. This method and process flow proposed in this paper is feasible for silicon photonics and compatible for other IC packaging such as ASIC with small pin number, which makes that the optoelectronics is closer to ASIC.