An experimental procedure for characterizing interconnects to the DC power bus on a multilayer printed circuit board

The effectiveness of DC power bus decoupling is impacted by the inductance associated with interconnect vias in printed circuit boards (PCBs). Adequate characterization of these interconnects is necessary to facilitate modeling and simulation, and to assess the effectiveness of added decoupling. A measurement procedure is presented for determining the series inductance and resistance of an interconnect with a network analyzer. The validity and limitations of the procedure are discussed. Experimental results of interconnect parameters on an 8/spl times/10 in ten-layer test-board corroborate those measured with a precision impedance analyzer. The measured interconnect values are used to simulate several cases of power-bus decoupling which show good agreement with two-port swept frequency measurements.