A 200 MIPS image signal multiprocessor on a single chip

An image signal multiprocessor (ISMP) that is composed of four processor elements (PEs) and a main controller and is designed for general-purpose local image processing or feature extraction is described. The processor uses parallel processing and a CMOS process providing integration density 10 times larger than that of a bipolar process. As a result, it operates at 200 MIPS with a 12-b precision. The ISMP has 300 K transistors on a 14.4*13.7-mm chip fabricated with 1.2- mu m double-metal CMOS process technology and is mounted in 176-pin grid array. The power dissipation is 2.9 W from a single 5-V power supply. Four PEs are the most suitable tradeoff between speed and integration level. The main controller controls start of execution, data input, data output, and PE program loading. The ISMP has five image input ports accepting five vertical image data. >