An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13 /spl mu/m pure digital CMOS technology

This paper presents an embedded interface, comprising both A/D and D/A converters, which has been implemented in a 0.13 /spl mu/m pure digital CMOS technology. The interface is integrated in a system for high-performance broad-band powerline communications. The A/D converter uses a pipelined structure, whereas the D/A stage is based on segmented current steering techniques. In both cases, specifications are 12-bit resolution at 80 MS/s and MTPR above 56 dB.