Dynamically reconfigurable component architecture

The invention relates to a coarse grain architecture component, dynamically reconfigurable, for the data processing by the processing units arranged in rows and interconnected so as to allow a pipeline processing or parallel or dependent rows mode. All types of data can be processed and the component can handle multiple applications simultaneously. The choice of grain control on several levels with limited control interconnect resources and data distribution circuitry permit local reconfiguration or entire component in one clock cycle.