Impact of dielectric pocket on analog/RF performance of short channel double gate MOSFET

In this paper, an exhaustive study of DPDG MOSFET for analog/RF performance has been done. DG MOSFET and DPDG MOSFET are examined through extensive 2D device simulation and comprehensive elucidation for investigating their suitability in nanoscale regime. The simulation result reveals that the DPDG MOSFET displays a significant enhancement over DG MOSFET for analog/RF performance in terms of their major figure of merits such as trans-conductance (g m ), output trans-conductance (g d ) early voltage (V EA )intrinsic gain (A v )trans-conductance generation factor (TGF), cut-off frequency (f T ), trans-conductance frequency product (TFP), gain frequency product (GFP), gain trans-conductance frequency product (GTFP). Further, higher order trans-conductance coefficients such as gm2, gm3 and inter-modulation device parameters such as VIP2, VIP3, IIP3 and IMD3 are analyzed for linearity performance of device that are useful for obtaining the device bias point for RFIC design optimization. The simulation result for electrostatic parameters such as drain induced barrier lowering (DIBL), subthreshold swing (SS) and ratio of I on to I off shows that DPDG MOSFET exhibit higher immunity against SCEs in comparison to DG MOSFET. Moreover, DPDG shows characteristics that makes it preferable for high linearity applications.