Ni-FUSI on high-k as a candidate for 65nm LSTP CMOS

We show for the first time that full Ni silicidation (Ni-FUSI) of poly gates in combination with Hf based gate dielectrics meets the required device performance for the 65nm LSTP technology node. Important device parameters, like C/sub inv/, mobility and drive currents exhibit significant improvement without compromising the oxide integrity and reliability. The drive of nMOS and pMOS transistors for the V/sub DD/=1.1V at 10pA//spl mu/m off state leakage is 575/spl mu/A/ /spl mu/m and 1650 /spl mu/A//spl mu/m respectively.