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All 2-Input Logic Gates and a Half-Adder in a Single Reconfigurable Plasmonic Cavity
All 2-Input Logic Gates and a Half-Adder in a Single Reconfigurable Plasmonic Cavity
2019
Upkar Kumar
Aurélien Cuche
Christian Girard
Sviatlana Viarbitskaya
Gérard Colas des Francs
Sreenath Bolisetty
Raffaele Mezzenga
Alexandre Bouhelier
Erik Dujardin
Keywords:
Optoelectronics
Adder
Logic gate
Plasmon
Computer science
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