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Delay test effectiveness evaluation of LSSD-based VLSI logic circuits
Delay test effectiveness evaluation of LSSD-based VLSI logic circuits
1991
David M. Wu
Charles E. Radke
Keywords:
Logic gate
Logic family
System testing
Very-large-scale integration
Logic optimization
Permission
Electronic engineering
Asynchronous circuit
Computer science
Reliability engineering
materials testing
Correction
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