Uniform Void-Free Epitaxial CoSi2 Formation on STI Bounded Narrow Si(100) Lines by Template Layer Stress Reduction

Void free epitaxial-CoSi 2 with nano-thickness has been successfully fabricated on narrow Si(100) substrates surrounded by shallow trench isolation (STI) using a capped titanium mediated epitaxy method. The silicide is epitaxial with a CoSi 2 (110)∥Si(100) crystal orientation. Void growth in the narrow silicon lines under the film edges due to an anomalous creep effect in the presence of a localized tensile stress between CoSi 2 and Si was suppressed completely by optimizing the initial rapid thermal annealing (RTA) thermal budget, and ensuring that no voids nucleated prior to the selective wet clean and second higher-temperature RTA process. The epitaxial Co-silicided n/p metal oxide semiconductor field effect transistors show excellent device performance.