Characterization of co x ni y o bimetallic oxide nanoparticles as charge trapping nodes in nonvolatile memory devices

The nanoparticles (NPs) have been widely used to supersede the conventional charge trapping layers (CTLs) of the silicon-oxide-nitride-oxide-silicon devices for reducing the charge loss due to a local leakage path. Moreover, to reduce the gate tunneling leakage current, the high-dielectric-constant (high-k) gate oxides with the identical equivalent-oxide thickness (EOT) are promising for the advanced metal-oxide-semiconductor (MOS) devices applications. Therefore, the NPs embedded in the high-k gate dielectric would be an attractive technology option for the nonvolatile memory device (NVM) applications.