Split-Array, C-2C Switched-Capacitor Power Amplifiers

This paper presents a 13-b C-2C split-array (SA) multiphase switched-capacitor power amplifier (SAMP-SCPA) implemented in 65-nm CMOS. The SAMP-SCPA was designed for 16-b resolution to offer extra states for linearization/calibration using digital pre-distortion (DPD). Resolution limits for SA SCPAs are presented. The SAMP-SCPA allows for the improvement of the SCPA resolution while minimizing the impact on the input power required driving it. A prototype SAMP-SCPA, occupying 0.85 mm $\times $ 2 mm, delivers a peak output power of 24 dBm with a peak system efficiency (SE) of 40% at 1.8 GHz. When amplifying a long-term evolution (LTE) signal, the average output power and SE are 18.8 dBm and 21.6%, respectively, with an adjacent channel leakage ration (ACLR) < −30 dBc and error vector magnitude (EVM) of 2.65% rms. The increased resolution allows output power to be traded off for improved linearity and a low power mode demonstrates an EVM as low as 1% rms.