Implementation of the MFCC front-end for low-cost speech recognition systems

Speech recognition front-end implemented using a high-end floating-point processor is expensive both in terms of computer resources and cost. This paper presents a new small footprint MFCC front-end design that is suitable for low-cost speech recognition systems. By exploiting the overlapping nature of the input frames and by adopting a simple pipeline structure, the implemented design only utilizes approximately 10% total resources of a low-cost and modest-size FPGA device, thus leaving significant space for speech recognition post-processing.