Thermal budget impact on HKMG Al 2 O 3 and La gate stacks for advanced DRAM periphery transistors

In this paper, the effects of various DRAM related thermal budgets on DRAM peripheral gate stacks using Al 2 O 3 , capping, La capping, and As I/I are evaluated. It is shown that Al 2 O 3 (PMOS stacks) and As I/I (NMOS stacks) are relatively immune to the aggressive thermal budgets imposed by the DRAM process flow. Apart from the traditional trade-off between eWF shift and gate stack mobility, it is shown that La based stacks are more seriously impacted. The eWF is reduced, but the mobility is degraded through an interface state density increase. However, PBTI is improved with thermal budget owing to thinner EOT, despite a small interfacial layer consumption.