Dimensional metrology challenges for ULSI interconnects

Manufacturing of Ultra-Large-Scale-Integration (ULSI) semiconductor devices will likely require feature sizes as small as 150 nm by the year 2001, with an overlay accuracy of 55 nm, a critical dimension (CD) control of 12 nm and a precision of 2 nm. While this level of overlay control is currently achievable, the forecast CD control/precision present formidable metrology challenges for multilevel interconnects due to the high aspect ratios of scaled features as well as the introduction of new materials such as low-k dielectrics and copper. New techniques for edge detection, profile definition and film thickness measurement will be needed to meet future metrology needs.