Reducing substrate coupling in 10 to 40 Gbit/s high–gain broadband amplifiers
2002
The influence of substrate coupling on the performance of a high-gain 30 Gbit/s transimpedance amplifier is investigated by simulation. Several measures for reducing this coupling down to an acceptable level are discussed and compared. Besides the reduction of parasitic on-chip and bond inductances, some of the most promising ways are the elimination of channel stopper outside the active region and a strong coupling of the backside of the chip to the underlying mounting socket. The measures have already been applied by the authors in practical broadband amplifiers; however, systematic and quantitative investigations are not published so far.
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