Studying the Reliability of Ge nFinFETs by the Normalized Input-referred Voltage Noise
2020
Due to the pre-existing defects in gate stack, especially in high - $\kappa$ dielectric layer, the PBTI degradation for advanced devices become more prominent than devices with conventional Poly/SiO 2 gate stack. The input referred voltage noise $(\mathrm{S}_{\mathrm{vg}})$ has a close relationship with oxide traps in gate stack, and the result shows its value at inner high-κ dielectric layer can be regarded as an indicator of PBTI degradation. It is shown that as the fin width (Wfin) decreases from 100nm to 16nm, $\mathrm{S}_{\mathrm{vgfb}}$ decreases firstly and then increases. The total component for BTI degradation that comes from oxide vacancies in the high-κ layer and the interface density $(\mathrm{D}_{\mathrm{it}})$ induces the degradation of the PBTI reliability with the decrease of Wfin.
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