A novel semiconductor capacitive sensor for a single-chip fingerprint sensor/identifier LSI

We describe a new semiconductor capacitive sensor structure and the fabrication process for a single-chip fingerprint sensor/identifier LSI in which the sensor is stacked on a 0.5-/spl mu/m CMOS LSI. To ascertain the influence of the fabrication process and normal usage on the underlying LSI, sensor chips were subjected to an electrostatic discharge (ESD) test, mechanical stress test, and unsaturated pressure cooker test (USPCT). ESD tolerance is obtained at the value of /spl plusmn/3.0 kV. To investigate mechanical stress, we carried out a tapping test. The sensor is immune to mechanical stress under the condition of 10/sup 4/ taps with the strength of 1 MPa. A multilayer passivation film consisting SiN under polyimide film provides protection against contamination such as water. Thus, under USPCT conditions of 130/spl deg/C, 80% humidity, and 48 h, the chips were not degraded. The tests confirm that the proposed sensor has sufficient reliability for normal identification usage.