A novel pulse processing scheme using embedded pulsed reset charge sensitive preamplifier

A novel, cost effective pulse height digitization scheme for spectroscopy applications, utilizing a CMOS analog switch as reset element in the feedback of preamplifier stage is designed. The CMOS switch resistance is controlled by a signal generated from a firmware, run in parallel with a digitizer. While the very high open-state resistance of the switch reduces the thermal noise in the preamplifier output, eliminating the need for pulse shaping, it increases the probability of pulse pile-up. A state machine run in conjunction with the firmware eliminates the pile–up event error contribution by prompting the firmware to prevent the piled-up pulse levels from getting registered. The Pulse height digitization and pile up elimination functions are implemented on a single-chip Programmable System on Chip (PSoC) mixed signal platform from Cypress Semiconductor. The digitized pulse heights are communicated to a PC based virtual instrument graphical user interface developed using National Instruments Lab VIEW. T...