A 10-bit 2GHz Current-Steering CMOS D/A Converter

This paper presents a 2GS/s 10-bit CMOS digital-to-analog converter (DAC). This DAC consists of a unit current-cell matrix for 6MSBs and another unit current-cell matrix for 4LSBs, trading off between the precision and size of the chip. The current mode logic (CML) is used to ensure high speed, and a double centro-symmetric current matrix is designed by the Q 2 random walk strategy in order to ensure the linearity of the DAC. The DAC occupies 2.2 times 2.2 mm 2 of die area, and consumes 790mw at a single 3.3V power supply