CMOS- compatible fabrication method of graphene-based micro devices

Abstract In this paper we present the CMOS-compatible procedure for graphene-based planar electronic devices (i.e. magnetic field sensor) fabrication in the hundreds of micrometer scale by using of: combined photolithography, Ar + ion sputtering and DC magnetron metal evaporation processes. In our approach, the conductive channels based on the single graphene layer on the SiC substrate have been fabricated by Ar + ion sputtering, instead of reactive - ion etching techniques. The proposed solution prevents against semiconductor surface oxidation and therefore is much more compatible with the standard CMOS technology. The processed graphene channels and devices demonstrate similar properties as fabricated by means of the early used procedures. That underline usefulness of the presented approach in many fields of applications, i.e.: the devices which contain graphene channels on standard reactive, semiconductor surfaces.