Extraction of Interface Trap Density in the Region Between Adjacent Wordlines in NAND Flash Memory Strings

A new method to extract the interface trap density ( ${N} _{\mathrm {\mathbf {it}}}$ ) on the surface of the Si region between adjacent wordlines (WLs—called space region) in nand flash devices is presented in this letter. The $\boldsymbol {N} _{\mathrm {\mathbf {it}}}$ is successfully extracted by applying charge pumping (CP) method, TCAD simulation, and modified equations. The CP current ${I} _{\mathrm {\mathbf {CP}}}$ of single WL and electrically tied two WLs are measured using fixed-base CP measurement as a function of pass bias. In addition, an effective space area for CP is extracted by TCAD simulation, and the equation, which is used to extract $\boldsymbol {N} _{\mathrm {\mathbf {it}}}$ , is modified to extract separated $\boldsymbol {N} _{\mathrm {\mathbf {it}}}$ s in the channel and the space regions. We confirm that our method is accurate by comparing the measured $\boldsymbol {I} _{\mathrm {\mathbf {CP}}}$ with the calculated one.