Multiprocessor silicon photonic interconnects: a systems perspective

The high bandwidth density and low power consumption characteristics of silicon photonics devices can provide a high performance interconnect solution for multiprocessor systems. At the same time this technology also poses a new set of constraints and challenges in architecting, designing, and integrating such systems. The "macrochip" multiprocessor architecture leverages a photonically interconnected array of processor and/or memory chips to provide a flexible platform to build heterogeneous systems. The design considerations for such a system are influenced largely by the system architecture, the programming model and devices needed for their implementation. This talk will first describe the macrochip platform, technology constraints and potential interconnect solutions with the various device building blocks. Then it will present some topology choices that range from a WDM point-to-point interconnect to more complex switched data channel networks. It will close with a detailed analysis of these design choices and show the impact of the device constraints on performance and power consumption along with some recent ultra-low power device implementation results.